32-bit and 64-bit (XLEN) harts using the same debug module

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Assuming a system with a 32-bit and a 64-bit core accessing the debug module over a 64-bit wide bus (BusWidth=64 in the debug module). In that case we maybe don't signal an error (cmderr) correctly when trying to to access a GPR register (dbg spec 3.6.1.1) of the 32-bit core correctly, since MaxAar that is reponsible for checking for accesses larger than XLEN of the core is set by BusWidth. See https://github.com/pulp-platform/riscv-dbg/blob/master/src/dm_mem.sv#L63

On the other hand it could be argued, that when requesting to access a GPR of the 32-bit core, the core will execute a 64-bit load/store operation that will trigger an illegal instruction exception, setting cmderr that way. cmderr for exceptions has the error code 3, which might not fit as well as error code 2 (meaning not supported operation), but there is no section that states what exact error has to be raised.