diff --git a/examples/serial_echo.rs b/examples/serial_echo.rs
index 5a51185..a6e485c 100644
--- a/examples/serial_echo.rs
+++ b/examples/serial_echo.rs
@@ -15,7 +15,7 @@ use cortex_m_rt::entry;
 use stm32f7xx_hal::{
     pac,
     prelude::*,
-    serial::{self, Serial},
+    serial::{self, Serial, UART},
 };
 
 #[entry]
@@ -31,7 +31,7 @@ fn main() -> ! {
     let tx = gpioa.pa9.into_alternate();
     let rx = gpiob.pb7.into_alternate();
 
-    let serial = Serial::new(
+    let serial = Serial::new_async_no_flwctl(
         p.USART1,
         (tx, rx),
         &clocks,
diff --git a/src/serial.rs b/src/serial.rs
index f097bb9..cc5a1de 100644
--- a/src/serial.rs
+++ b/src/serial.rs
@@ -41,11 +41,13 @@ pub enum Error {
 pub trait Pins<USART> {}
 pub trait PinTx<USART> {}
 pub trait PinRx<USART> {}
+pub trait PinCts<USART> {}
+pub trait PinRts<USART> {}
 
-impl<USART, TX, RX> Pins<USART> for (TX, RX)
+impl<U, TX, RX> Pins<U> for (TX, RX)
 where
-    TX: PinTx<USART>,
-    RX: PinRx<USART>,
+    TX: PinTx<U>,
+    RX: PinRx<U>,
 {
 }
 
@@ -113,34 +115,156 @@ impl PinRx<USART6> for gpio::PC7<Alternate<8>> {}
 impl PinRx<USART6> for gpio::PG9<Alternate<8>> {}
 impl PinRx<UART7> for gpio::PE7<Alternate<8>> {}
 impl PinRx<UART7> for gpio::PF6<Alternate<8>> {}
+// TODO where is UART8?
+
+impl PinCts<USART1> for gpio::PA11<Alternate<7>> {}
+impl PinCts<USART2> for gpio::PA0<Alternate<7>> {}
+impl PinCts<USART3> for gpio::PB13<Alternate<7>> {}
+impl PinCts<USART3> for gpio::PD11<Alternate<7>> {}
+impl PinCts<UART4> for gpio::PA15<Alternate<8>> {}
+impl PinCts<UART5> for gpio::PC9<Alternate<7>> {}
+impl PinCts<USART6> for gpio::PG13<Alternate<8>> {}
+impl PinCts<USART6> for gpio::PG15<Alternate<8>> {}
+impl PinCts<UART7> for gpio::PE10<Alternate<8>> {}
+impl PinCts<UART7> for gpio::PF9<Alternate<8>> {}
+
+impl PinRts<USART1> for gpio::PA12<Alternate<7>> {}
+impl PinRts<USART2> for gpio::PA1<Alternate<7>> {}
+impl PinRts<USART3> for gpio::PB14<Alternate<7>> {}
+impl PinRts<USART3> for gpio::PD12<Alternate<7>> {}
+impl PinRts<UART4> for gpio::PB0<Alternate<8>> {}
+impl PinRts<UART5> for gpio::PC8<Alternate<7>> {}
+impl PinRts<USART6> for gpio::PG8<Alternate<8>> {}
+impl PinRts<USART6> for gpio::PG12<Alternate<8>> {}
+impl PinRts<UART7> for gpio::PE9<Alternate<8>> {}
+impl PinRts<UART7> for gpio::PF8<Alternate<8>> {}
+
+pub enum IrDAPower {
+    Normal,
+    Low,
+}
+
+pub enum Rs485Polarity {
+    High,
+    Low,
+}
+
+enum AsyncFlowControl {
+    Rs232None,
+    Rs232CtsRts,
+    Rs232Cts,
+    Rs232Rts,
+    Rs485(Rs485Polarity),
+}
+
+enum SerialMode {
+    // These options are for any UART, including USART
+    Asynchronous(AsyncFlowControl),
+    SingleWire,
+    MultiprocessorCommunication,
+    IrDA(IrDAPower),
+    ModbusCommunication,
+    LIN,
+
+    // The following options are for USART only
+    Synchronous,
+    SmartCard,
+    SmartCardWithCardLock,
+}
 
 /// Serial abstraction
-pub struct Serial<USART, PINS> {
-    usart: USART,
+pub struct Serial<U, PINS> {
+    usart: U,
     pins: PINS,
 }
 
-impl<USART, PINS> Serial<USART, PINS>
+pub trait UART<U: Instance, PINS: Pins<U>> {
+    fn new_async_no_flwctl<>(
+        uart: U, pins: PINS, clocks: &Clocks, config: Config,
+    ) -> Serial<U, PINS> {
+        Serial::new(uart, pins, clocks, config,
+                    SerialMode::Asynchronous(AsyncFlowControl::Rs232None))
+    }
+
+    fn new_async_rs232_cts_rts<CTS: PinCts<U>, RTS: PinRts<U>>(
+        uart: U, pins: PINS, clocks: &Clocks, config: Config, cts: CTS, rts: RTS,
+    ) -> Serial<U, PINS> {
+        // TODO Clarify if we can borrow cts and rts and keep them borrowed.
+        // TODO Note that at the moment any CTS and RTS pin of this U(S)ART would be accepted
+        //      This may be too flexible.
+        Serial::new(uart, pins, clocks, config,
+                    SerialMode::Asynchronous(AsyncFlowControl::Rs232CtsRts))
+    }
+
+    fn new_async_rs232_cts<CTS: PinCts<U>>(
+        uart: U, pins: PINS, clocks: &Clocks, config: Config, cts: CTS,
+    ) -> Serial<U, PINS> {
+        Serial::new(uart, pins, clocks, config,
+                    SerialMode::Asynchronous(AsyncFlowControl::Rs232Cts))
+    }
+
+    fn new_async_rs232_rts<RTS: PinRts<U>>(
+        uart: U, pins: PINS, clocks: &Clocks, config: Config, rts: RTS,
+    ) -> Serial<U, PINS> {
+        Serial::new(uart, pins, clocks, config,
+                    SerialMode::Asynchronous(AsyncFlowControl::Rs232Rts))
+    }
+
+    fn new_async_rs458<RTS: PinRts<U>>(
+        uart: U, pins: PINS, clocks: &Clocks, config: Config, polarity: Rs485Polarity,
+    ) -> Serial<U, PINS> {
+        Serial::new(uart, pins, clocks, config,
+                    SerialMode::Asynchronous(AsyncFlowControl::Rs485(polarity)))
+    }
+
+    fn new_irda<RTS: PinRts<U>>(
+        uart: U, pins: PINS, clocks: &Clocks, config: Config, irda_power: IrDAPower,
+    ) -> Serial<U, PINS> {
+        Serial::new(uart, pins, clocks, config,
+                    SerialMode::IrDA(irda_power))
+    }
+
+    // TODO Add constructors for other modes of operation
+}
+impl <PINS: Pins<UART4>> UART<UART4, PINS> for Serial<UART4, PINS> {}
+impl <PINS: Pins<UART5>> UART<UART5, PINS> for Serial<UART5, PINS> {}
+impl <PINS: Pins<UART7>> UART<UART7, PINS> for Serial<UART7, PINS> {}
+// TODO where is UART8?
+impl <PINS: Pins<USART1>> UART<USART1, PINS> for Serial<USART1, PINS> {}
+impl <PINS: Pins<USART2>> UART<USART2, PINS> for Serial<USART2, PINS> {}
+impl <PINS: Pins<USART3>> UART<USART3, PINS> for Serial<USART3, PINS> {}
+impl <PINS: Pins<USART6>> UART<USART6, PINS> for Serial<USART6, PINS> {}
+
+// TODO add USART trait which would have USART-specific modes like "Synchronous" and "SmartCard"
+// TOOD add add implementation of those traits for all USART*
+
+impl<U, PINS> Serial<U, PINS>
 where
-    PINS: Pins<USART>,
-    USART: Instance,
+    PINS: Pins<U>,
+    U: Instance,
 {
-    pub fn new(usart: USART, pins: PINS, clocks: &Clocks, config: Config) -> Self {
+    fn new(
+        usart: U,
+        pins: PINS,
+        clocks: &Clocks,
+        config: Config,
+        mode: SerialMode
+    ) -> Self {  // TODO remove "pub"
         // NOTE(unsafe) This executes only during initialisation
         let rcc = unsafe { &(*RCC::ptr()) };
 
         // TODO: The unsafe calls below should be replaced with accessing
         //       the correct registers directly.
 
-        USART::select_sysclock(rcc, config.sysclock);
+        U::select_sysclock(rcc, config.sysclock);
         unsafe {
-            USART::enable_unchecked();
+            U::enable_unchecked();
         }
 
         let clk = if config.sysclock {
             clocks.sysclk()
         } else {
-            USART::clock(clocks)
+            U::clock(clocks)
         };
 
         // Calculate correct baudrate divisor on the fly
@@ -192,6 +316,71 @@ where
         // Enable DMA
         usart.cr3.write(|w| w.dmat().enabled().dmar().enabled());
 
+        match mode {
+            SerialMode::Asynchronous(flow_control) => {
+                usart.cr2.write(|w| w.linen().clear_bit().clken().clear_bit());
+                usart.cr3.write(|w| w.scen().clear_bit().iren().clear_bit().hdsel().clear_bit());
+                match flow_control {
+                    AsyncFlowControl::Rs232None => {
+                        usart.cr3.write(|w| w.ctse().disabled().rtse().disabled());
+                    },
+                    AsyncFlowControl::Rs232CtsRts => {
+                        usart.cr3.write(|w| w.ctse().enabled().rtse().enabled());
+                    },
+                    AsyncFlowControl::Rs232Cts => {
+                        usart.cr3.write(|w| w.ctse().enabled().rtse().disabled());
+                    },
+                    AsyncFlowControl::Rs232Rts => {
+                        usart.cr3.write(|w| w.ctse().disabled().rtse().enabled());
+                    },
+                    AsyncFlowControl::Rs485(polarity) => {
+                        usart.cr3.write(|w| w.dem().enabled());  // drive-enabled mode ON
+                        usart.cr3.write(|w| w.dep().bit(match polarity {
+                            Rs485Polarity::High => false,
+                            Rs485Polarity::Low => true,
+                        }));
+                        usart.cr1.write(|w| w.deat().bits(0));  // setting the assertion time
+                        usart.cr1.write(|w| w.dedt().bits(0));  // setting the de-assertion time
+                        // TODO ^ make the times be configurable?
+                    },
+                }
+            },
+            SerialMode::SingleWire => {
+                usart.cr2.write(|w| w.linen().clear_bit().clken().clear_bit());
+                usart.cr3.write(|w| w.scen().clear_bit().iren().clear_bit());
+                usart.cr3.write(|w| w.hdsel().set_bit());
+            },
+            SerialMode::MultiprocessorCommunication => {
+                // TODO implement this
+            },
+            SerialMode::IrDA(power) => {
+                usart.cr3.write(|w| w.irlp().bit(match power {
+                    IrDAPower::Normal => false,
+                    IrDAPower::Low => true,
+                }));
+                usart.gtpr.write(|w| w.gt().bits(1));  // setting the prescaler
+
+                usart.cr2.write(|w| w.linen().clear_bit().clken().clear_bit().stop().bits(0));
+                usart.cr3.write(|w| w.scen().clear_bit().hdsel().clear_bit());
+                usart.cr3.write(|w| w.iren().set_bit());
+            },
+            SerialMode::ModbusCommunication => {
+                // TODO implement this
+            },
+            SerialMode::LIN => {
+                // TODO implement this
+            },
+            SerialMode::Synchronous => {
+                // TODO implement this
+            },
+            SerialMode::SmartCard => {
+                // TODO implement this
+            },
+            SerialMode::SmartCardWithCardLock => {
+                // TODO implement this
+            },
+        }
+
         Serial { usart, pins }
     }
 
@@ -215,7 +404,7 @@ where
         }
     }
 
-    pub fn split(self) -> (Tx<USART>, Rx<USART>) {
+    pub fn split(self) -> (Tx<U>, Rx<U>) {
         (
             Tx {
                 _usart: PhantomData,
@@ -226,40 +415,40 @@ where
         )
     }
 
-    pub fn release(self) -> (USART, PINS) {
+    pub fn release(self) -> (U, PINS) {
         (self.usart, self.pins)
     }
 }
 
-impl<USART, PINS> serial::Read<u8> for Serial<USART, PINS>
+impl<U, PINS> serial::Read<u8> for Serial<U, PINS>
 where
-    USART: Instance,
+    U: Instance,
 {
     type Error = Error;
 
     fn read(&mut self) -> nb::Result<u8, Error> {
-        let mut rx: Rx<USART> = Rx {
+        let mut rx: Rx<U> = Rx {
             _usart: PhantomData,
         };
         rx.read()
     }
 }
 
-impl<USART, PINS> serial::Write<u8> for Serial<USART, PINS>
+impl<U, PINS> serial::Write<u8> for Serial<U, PINS>
 where
-    USART: Instance,
+    U: Instance,
 {
     type Error = Error;
 
     fn flush(&mut self) -> nb::Result<(), Self::Error> {
-        let mut tx: Tx<USART> = Tx {
+        let mut tx: Tx<U> = Tx {
             _usart: PhantomData,
         };
         tx.flush()
     }
 
     fn write(&mut self, byte: u8) -> nb::Result<(), Self::Error> {
-        let mut tx: Tx<USART> = Tx {
+        let mut tx: Tx<U> = Tx {
             _usart: PhantomData,
         };
         tx.write(byte)
@@ -267,13 +456,13 @@ where
 }
 
 /// Serial receiver
-pub struct Rx<USART> {
-    _usart: PhantomData<USART>,
+pub struct Rx<U> {
+    _usart: PhantomData<U>,
 }
 
-impl<USART> Rx<USART>
+impl<U> Rx<U>
 where
-    USART: Instance,
+    U: Instance,
     Self: dma::Target,
 {
     /// Reads data using DMA until `buffer` is full
@@ -292,7 +481,7 @@ where
     {
         // This is safe, as we're only using the USART instance to access the
         // address of one register.
-        let address = &unsafe { &*USART::ptr() }.rdr as *const _ as _;
+        let address = &unsafe { &*U::ptr() }.rdr as *const _ as _;
 
         // Safe, because the trait bounds on this method guarantee that `buffer`
         // can be written to safely.
@@ -309,18 +498,18 @@ where
     }
 }
 
-impl<USART> serial::Read<u8> for Rx<USART>
+impl<U> serial::Read<u8> for Rx<U>
 where
-    USART: Instance,
+    U: Instance,
 {
     type Error = Error;
 
     fn read(&mut self) -> nb::Result<u8, Error> {
         // NOTE(unsafe) atomic read with no side effects
-        let isr = unsafe { (*USART::ptr()).isr.read() };
+        let isr = unsafe { (*U::ptr()).isr.read() };
 
         // NOTE(unsafe): Only used for atomic writes, to clear error flags.
-        let icr = unsafe { &(*USART::ptr()).icr };
+        let icr = unsafe { &(*U::ptr()).icr };
 
         if isr.pe().bit_is_set() {
             icr.write(|w| w.pecf().clear());
@@ -344,7 +533,7 @@ where
             return Ok(unsafe {
                 // Casting to `u8` should be fine, as we've configured the USART
                 // to use 8 data bits.
-                (*USART::ptr()).rdr.read().rdr().bits() as u8
+                (*U::ptr()).rdr.read().rdr().bits() as u8
             });
         }
 
@@ -353,14 +542,14 @@ where
 }
 
 /// Serial transmitter
-pub struct Tx<USART> {
-    _usart: PhantomData<USART>,
+pub struct Tx<U> {
+    _usart: PhantomData<U>,
 }
 
-impl<USART> Tx<USART>
+impl<U> Tx<U>
 where
     Self: dma::Target,
-    USART: Instance,
+    U: Instance,
 {
     /// Writes data using DMA
     ///
@@ -380,7 +569,7 @@ where
         // STM32F74xxx, section 31.5.15.
         //
         // This is safe, as we're doing just one atomic write.
-        let usart = unsafe { &*USART::ptr() };
+        let usart = unsafe { &*U::ptr() };
         usart.icr.write(|w| w.tccf().clear());
 
         // Safe, because the trait bounds on this method guarantee that `buffer`
@@ -398,15 +587,15 @@ where
     }
 }
 
-impl<USART> serial::Write<u8> for Tx<USART>
+impl<U> serial::Write<u8> for Tx<U>
 where
-    USART: Instance,
+    U: Instance,
 {
     type Error = Error;
 
     fn flush(&mut self) -> nb::Result<(), Self::Error> {
         // NOTE(unsafe) atomic read with no side effects
-        let isr = unsafe { (*USART::ptr()).isr.read() };
+        let isr = unsafe { (*U::ptr()).isr.read() };
 
         if isr.tc().bit_is_set() {
             Ok(())
@@ -417,12 +606,12 @@ where
 
     fn write(&mut self, byte: u8) -> nb::Result<(), Self::Error> {
         // NOTE(unsafe) atomic read with no side effects
-        let isr = unsafe { (*USART::ptr()).isr.read() };
+        let isr = unsafe { (*U::ptr()).isr.read() };
 
         if isr.txe().bit_is_set() {
             // NOTE(unsafe) atomic write to stateless register
             // NOTE(write_volatile) 8-bit write that's not possible through the svd2rust API
-            unsafe { ptr::write_volatile(&(*USART::ptr()).tdr as *const _ as *mut _, byte) }
+            unsafe { ptr::write_volatile(&(*U::ptr()).tdr as *const _ as *mut _, byte) }
             Ok(())
         } else {
             Err(nb::Error::WouldBlock)
@@ -438,7 +627,6 @@ pub struct Config {
     pub sysclock: bool,
     pub parity: Parity,
     pub data_bits: DataBits,
-
 }
 
 pub enum Oversampling {
@@ -531,9 +719,9 @@ impl_instance! {
     UART7:  (uart7sel),
 }
 
-impl<USART> fmt::Write for Tx<USART>
+impl<U> fmt::Write for Tx<U>
 where
-    Tx<USART>: serial::Write<u8>,
+    Tx<U>: serial::Write<u8>,
 {
     fn write_str(&mut self, s: &str) -> fmt::Result {
         let _ = s.as_bytes().iter().map(|c| block!(self.write(*c))).last();